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| 1.6 On Resistance, 15 V iCMOS SPST Switch ADG1517 FEATURES 1.6 on resistance 0.4 on resistance flatness Up to 250 mA continuous current Fully specified at 15 V No VL supply required 3 V logic-compatible inputs Rail-to-rail operation 8-lead 3 mm x 2 mm LFCSP package FUNCTIONAL BLOCK DIAGRAM ADG1517 S D IN APPLICATIONS Audio signal routing Video signal routing Battery-powered systems Communication systems Data acquisition systems Relay replacement NOTES 1. SWITCH SHOWN FOR A LOGIC 1 INPUT. Figure 1. GENERAL DESCRIPTION The ADG1517 is a single-pole/single-throw (SPST) switch. Figure 1 shows that with a logic input of 1, the switch of the ADG1517 is closed. The switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. The iCMOSTM (industrial CMOS) modular manufacturing process combines high voltage CMOS (complementary metal-oxide semiconductor) and bipolar technologies. It enables the development of a wide range of high performance analog ICs in a footprint that no other generation of high voltage parts has been able to achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and reduced package size. The on resistance profile is very flat over the full analog input range, ensuring excellent linearity and low distortion when switching audio signals. iCMOS construction ensures ultralow power dissipation, making the part ideally suited for portable and battery-powered instruments. PRODUCT HIGHLIGHTS 1. 2. 3. 4. 1.85 maximum on resistance at 25C. Minimum distortion. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V. No VL logic power supply required. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2008 Analog Devices, Inc. All rights reserved. 07793-001 ADG1517 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Single Supply ................................................................................. 3 Continuous Current, S or D ........................................................ 3 Absolute Maximum Ratings ............................................................4 Thermal Resistance .......................................................................4 ESD Caution...................................................................................4 Pin Configuration and Function Descriptions..............................5 Typical Performance Characteristics ..............................................6 Test Circuits ........................................................................................8 Terminology .................................................................................... 10 Outline Dimensions ....................................................................... 11 Ordering Guide .......................................................................... 11 REVISION HISTORY 10/08--Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADG1517 SPECIFICATIONS SINGLE SUPPLY VDD = 15 V 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off) Drain Off Leakage, ID (Off) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS1 tON tOFF Charge Injection Off Isolation Total Harmonic Distortion + Noise (THD + N) -3 dB Bandwidth Insertion Loss CS (Off) CD (Off) CD, CS (On) POWER REQUIREMENTS IDD IDD VDD 1 25C -40C to +85C -40C to +125C 0 V to VDD Unit V typ max typ max nA typ nA typ nA typ Test Conditions/Comments 1.6 1.85 0.4 0.5 10 10 10 2.4 0.6 2.75 0.7 VS = 0 V to 10 V, IS = -10 mA; see Figure 13 VDD = 13.5 V VS = 0 V to 10 V, IS = -10 mA VDD = 16.5 V VS = 1 V, VD = 10 V; or VS = 10 V, VD = 1 V; see Figure 14 VS = 1 V, VD = 10 V; or VS = 10 V, VD = 1 V; see Figure 14 VS = VD = 1 V or 10 V, see Figure 15 2.0 0.8 0.001 0.1 4 135 175 115 155 70 -60 0.04 65 -0.16 68 68 185 0.001 1.0 75 145 5/16.5 V min V max A typ A max pF typ ns typ ns max ns typ ns max pC typ dB typ % typ MHz typ dB typ pF typ pF typ pF typ A typ A max A typ A max V min/max VIN = VGND or VDD 220 190 250 220 RL = 300 , CL = 35 pF VS = 10 V; see Figure 19 RL = 300 , CL = 35 pF VS = 10 V; see Figure 19 VS = 8 V, RS = 0 , CL = 1 nF; see Figure 20 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 16 RL = 110 , 7.5 V p-p, f = 20 Hz to 20 kHz; see Figure 18 RL = 50 , CL = 5 pF; see Figure 17 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 17 f = 1 MHz; VS = 7.5 V f = 1 MHz; VS = 7.5 V f = 1 MHz; VS = 7.5 V VDD = 16.5 V Digital inputs = 0 V or VDD Digital inputs = 5 V GND = 0 V Guaranteed by design, not subject to production test. CONTINUOUS CURRENT, S OR D Table 2. Parameter CONTINUOUS CURRENT, S or D1, 2 1 2 25C 250 85C 150 125C 100 Unit mA max Test Conditions/Comments VDD = 13.5 V, GND = 0 V Guaranteed by design, not subject to production test. Data based on JA data shown in Table 4. Rev. 0 | Page 3 of 12 ADG1517 ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Table 3. Parameter VDD to GND Analog Inputs1 Digital Inputs1 Peak Current, S or D Operating Temperature Range Industrial Storage Temperature Range Junction Temperature Reflow Soldering Peak Temperature, Pb Free 1 THERMAL RESISTANCE JA is specified for a 4-layer board and with the exposed pad soldered to the board. Table 4. Thermal Resistance Package Type 8-Lead LFCSP (CP-8-4) JA 50.8 Unit C/W Rating -0.3 V to +25 V GND - 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first GND - 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first Data in Table 2 + 10% (pulsed at 1 ms, 10% duty cycle max) -40C to +125C -65C to +150C 150C 260C ESD CAUTION Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 4 of 12 ADG1517 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS S1 NC 2 GND 3 VDD 4 NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD TIED TO GND. 8D ADG1517 TOP VIEW (Not to Scale) 7 GND 6 IN 5 NC 07793-002 Figure 2. Pin Configuration Table 5. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 (EPAD) Mnemonic S NC GND VDD NC IN GND D Exposed Paddle (EPAD) Description Source Terminal. Can be an input or output. No Connect. Ground (0 V) Reference. Both GND pins must be connected to GND potential. Most Positive Power Supply Potential. No Connect. Logic Control Input. Ground (0 V) Reference. Both GND pins must be connected to GND potential. Drain Terminal. Can be an input or output. The exposed paddle should be tied to GND. Table 6. Truth Table ADG1517 IN Pin 1 0 Switch Condition On Off Rev. 0 | Page 5 of 12 ADG1517 TYPICAL PERFORMANCE CHARACTERISTICS 4.5 4.0 3.5 GND = 0V TA = 25C VDD = 5V 160 140 120 GND = 0V VDD = 15V TA = 25C ON RESISTANCE () 3.0 IDD (A) VDD VDD VDD VDD VDD 0 2 4 6 8 10 12 = 12V = 13.5V = 14V = 15V = 16.5V 07793-003 2.5 2.0 1.5 1.0 0.5 0 VDD = 8V 100 80 60 40 20 0 14 16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 VD OR VS (V) LOGIC, IN (V) Figure 3. On Resistance as a Function of VD or VS for Single Supply 3.0 Figure 6. IDD vs. Logic Level 250 200 2.5 CHARGE INJECTION (pC) 150 100 50 0 -50 -100 SOURCE TO DRAIN ON RESISTANCE () 2.0 1.5 1.0 TA = -40C TA = +25C TA = +70C TA = +85C TA = +125C 07793-004 DRAIN TO SOURCE -150 -200 -250 0 2 4 6 8 VS (V) 10 12 VDD = 15V GND = 0V TA = 25C 14 16 07793-021 0.5 GND = 0V VDD = 15V 0 1 2 3 4 5 6 7 8 9 0 10 11 12 13 14 15 VD OR VS (V) Figure 4. On Resistance as a Function of VD or VS for Different Temperatures, Single Supply 20 18 16 14 GND = 0V VDD = 15V VBIAS = 1V/10V Figure 7. Charge Injection vs. Source Voltage 200 180 160 140 ID, IS (ON) +, + ID, IS (ON) -, - ID (OFF) -, + IS (OFF) +, - ID (OFF) +, - IS (OFF) -, + 15V SS tON LEAKAGE (nA) 12 10 8 6 4 2 0 07793-005 TIME (ns) 120 100 80 60 40 20 15V SS tOFF 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 120 TEMPERATURE (C) TEMPERATURE (C) Figure 5. Leakage Currents as a Function of Temperature, Single Supply Figure 8. tON/tOFF Times vs. Temperature Rev. 0 | Page 6 of 12 07793-007 -2 0 -40 07793-006 ADG1517 0 -10 -20 GND = 0V VDD = 15V TA = 25C 0.045 0.040 0.035 0.030 VS = 7.5V p-p OFF ISOLATION (dB) -30 -40 THD+N (%) -50 -60 -70 -80 -90 -100 100 1k 10k 100k 1M 10M 100M 07793-008 0.025 0.020 0.015 0.010 0.005 0 10 100 VS = 5V p-p VS = 2.5V p-p 1k FREQUENCY (Hz) 10k 100k FREQUENCY (Hz) Figure 9. Off Isolation vs. Frequency Figure 11. THD + N vs. Frequency 0 -1 -2 -3 -4 -5 -6 GND = 0V VDD = 15V TA = 25C 100k 1M FREQUENCY (Hz) 10M 100M 07793-009 -10 VDD = 15V GND = 0V TA = 25C V p-p = 0.62V NO DECOUPLING CAPACITORS INSERTION LOSS (dB) -30 ACPSRR (dB) -50 DECOUPLING CAPACITORS ON SUPPLIES -70 -90 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 10. On Response vs. Frequency Figure 12. ACPSRR vs. Frequency Rev. 0 | Page 7 of 12 07793-011 -7 10k -110 100 07793-022 -110 VDD = 15V GND = 0V LOAD = 110 ADG1517 TEST CIRCUITS VDD 0.1F NETWORK ANALYZER 50 VS VOUT VDD S IN V 50 D VIN D IDS 07793-013 S GND RL 50 OFF ISOLATION = 20 log VS Figure 13. On Resistance VDD 0.1F Figure 16. Off Isolation VDD S IN D IS (OFF) A VS S D ID (OFF) A 07793-014 NETWORK ANALYZER 50 VS VOUT VIN GND RL 50 INSERTION LOSS = 20 log VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 14. Off Resistance Figure 17. Bandwidth VDD 0.1F AUDIO PRECISION VDD RS S IN ID (ON) NC S D A 07793-015 D VIN GND RL 110 VOUT VS V p-p NC = NO CONNECT VD Figure 15. On Leakage Figure 18. THD + Noise Rev. 0 | Page 8 of 12 07793-020 07793-019 VD 07793-018 VS VOUT ADG1517 VDD 0.1F VDD S VS D RL 300 GND VOUT VIN IN CL 35pF VOUT ADG1517 50% 90% 50% 90% 07793-016 07793-017 tON tOFF Figure 19. Switching Times VDD VDD RS VS S D VOUT CL 1nF GND VIN VOUT QINJ = CL x VOUT IN ADG1517 VOUT Figure 20. Charge Injection Rev. 0 | Page 9 of 12 ADG1517 TERMINOLOGY IDD The positive supply current. VD (VS) The analog voltage on Terminal D and Terminal S. RON The ohmic resistance between D and S. RFLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. IS (Off) The source leakage current with the switch off. ID (Off) The drain leakage current with the switch off. ID, IS (On) The channel leakage current with the switch on. VINL The maximum input voltage for Logic 0. VINH The minimum input voltage for Logic 1. IINL (IINH) The input current of the digital input. CS (Off) The off switch source capacitance, measured with reference to ground. CD (Off) The off switch drain capacitance, measured with reference to ground. CD, CS (On) The on switch capacitance, measured with reference to ground. CIN The digital input capacitance. tON Delay time between the 50% and 90% points of the digital input and switch on condition. tOFF Delay time between the 50% and 90% points of the digital input and switch off condition. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Off Isolation A measure of unwanted signal coupling through an off switch. Bandwidth The frequency at which the output is attenuated by 3 dB. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. THD + N The ratio of the harmonic amplitude plus noise of the signal to the fundamental. ACPSRR (AC Power Supply Rejection Ratio) Measures the ability of a part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. The dc voltage on the device is modulated by a sine wave of 0.62 V p-p. The ratio of the amplitude of signal on the output to the amplitude of the modulation is the ACPSRR. Rev. 0 | Page 10 of 12 ADG1517 OUTLINE DIMENSIONS 2.00 BSC 1.75 1.65 1.50 5 8 3.00 BSC EXPOSED PAD 1.90 1.80 1.65 1 0.20 MIN 4 INDEX AREA TOP VIEW 0.80 0.75 0.70 SEATING PLANE 0.50 0.40 0.30 0.15 REF COPLANARITY 0.08 0.05 MAX 0.02 NOM PIN 1 INDICATOR BOTTOM VIEW SIDE VIEW Figure 21. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 3 mm x 2 mm Body, Very Very Thin, Dual Lead (CP-8-4) Dimensions shown in millimeters ORDERING GUIDE Model ADG1517BCPZ-REEL71 1 Temperature Range -40C to +125C Package Description 8-Lead Lead Frame Chip Scale Package (LFCSP_WD) Package Option CP-8-4 081806-A 0.50 0.30 0.25 0.20 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. Branding 1E Z = RoHS Compliant Part. Rev. 0 | Page 11 of 12 ADG1517 NOTES (c)2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07793-0-10/08(0) Rev. 0 | Page 12 of 12 |
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